1. Field of the Invention
The present invention relates to a liquid crystal display, and, more particularly, to a liquid crystal display array board capable of maintaining the capacity of a storage capacitor while reducing the area of the storage capacitor, and a method of fabricating the same.
2. Discussion of Related Art
Cathode ray tubes (CRTs) have been used as screen display devices for displaying picture information on screens. However, the CRTs are large and heavy with small display area.
Therefore, thin film flat panel displays (FPDs) that are thin with large display area that can be easily used in any place have been developed and are replacing the CRTs. In particular, liquid crystal displays (LCDs) have higher resolution than other FPDs and have response speed as high as the response speed of the CRTs when a moving picture is being displayed.
As is well known, optical anisotropy and polarizability of liquid crystal are used to drive an LCD. Since liquid crystal molecules are thin and long, an electromagnetic field is applied to the liquid crystal molecules that are arranged with orientation and polarizability to control the direction in which the molecules are arranged. Therefore, when the orientation is selectively controlled, light is transmitted or shielded in accordance with the orientation of the liquid crystal molecules due to the optical anisotropy of the liquid crystal molecules so that it is possible to display color and image.
In an active matrix type LCD, non-linear active devices are provided to pixels arranged in a matrix and the operations of the pixels are controlled using the switching characteristic of the active devices so that a memory function is realized by the electro-optical effect of liquid crystal.
On the other hand, according to the active matrix type LCD, in order to secure uniformity of a displayed image, it is necessary to maintain a signal voltage input through data wiring lines until next input for a predetermined time. Therefore, a storage capacitor is formed to run parallel to liquid crystal cells.
The storage capacitor formed in the LCD can be categorized as either an on-common mode or an on-gate mode in accordance with a mode in which a charge electrode is used.
The modes are compared with each other as follows. In the on-gate mode, a part of a (n−1)th scan line is used as the charge electrode of an nth pixel. Here, the degree of reduction in aperture ratio is small, the point defect generated in a normally white (NW) mode is not easily found, the yield is high, and the scan signal time is long.
In the on-common mode, a charge electrode is additionally provided. Here, the scan signal time is short, the degree of reduction in the aperture ratio is large, the point defect generated in the NW mode is easily found, and the yield is low.
Hereinafter, a conventional storage capacitor in an on-common mode will be simply described with reference to FIG. 1.
FIG. 1 schematically illustrates an LCD array board of a conventional LCD on which a storage capacitor in an on-common mode is formed.
Referring to FIG. 1, in the LCD array board on which the storage capacitor in the on-common mode is formed, on an insulating substrate that is a lower plate, a plurality of gate wiring lines 9 and 19 and data wiring lines 10 and 20 cross (cross over or intersect) to form crossings (or intersections). In an area defined by a crossing (or an intersection) where an arbitrary data wiring line (for example, 10) and an arbitrary gate wiring line (for example, 19) cross (or intersect each other), a thin film transistor (TFT) is formed. The TFT includes a source electrode 11, a drain electrode 12, a gate electrode 14 that is the same wiring line as the gate wiring line 19, and a semiconductor layer 13. Here, the source electrode 11 is the same wiring line as the data wiring line 10. Also, a pixel electrode 15 is connected to the drain electrode 12 and separated from the scan line 19 and the signal line 10 by a uniform distance. A first electrode 16 of the storage capacitor is positioned to run parallel with the gate wiring line 19 and to cross the pixel electrode 15.
In the storage capacitor in the on-common mode of the above-described structure, charges are accumulated between the pixel electrode 15 (i.e., a second electrode of the storage capacitor) and the first electrode 16 of the storage capacitor that is formed of the same material as the gate electrode 14. Here, the magnitude of the capacitance accumulated in the storage capacitor is determined by C=∈*A/d, where C, ∈, A, and d represent the capacitance, the dielectric constant, the area of an electrode, and the distance between electrodes, respectively.
In order to secure the uniformity of an image displayed by an LCD, it is required that the capacitance accumulated by the storage capacitor be large. However, when the area of the storage capacitor is increased in order to increase the capacitance, the aperture ratio is reduced such that the total brightness is reduced.